Cadence Advances AI in the Cloud with Industry-First DDR5 12.8Gbps MRDIMM Gen2 Memory IP System Solution
High-performance data center and enterprise memory solution available now for customer engagements
This press release features multimedia. View the full release here: https://www.businesswire.com/news/home/20250421736348/en/

The Cadence DDR5 MRDIMM IP design is validated in hardware using the most recently available MRDIMMs (Gen2), achieving a best-in-class 12.8Gbps data rate that doubles the bandwidth using current DDR5 6400Mbps DRAM parts.
The new Cadence DDR5 IP offers a PHY and a high-performance controller as a complete memory subsystem. The design is validated in hardware using the most recently available MRDIMMs (Gen2), achieving a best-in-class 12.8Gbps data rate that doubles the bandwidth using current DDR5 6400Mbps DRAM parts. The DDR5 IP memory subsystem is based on Cadence’s silicon-proven, high-performance architecture, ultra-low latency encryption and industry-leading RAS features. The DDR5 MRDIMM Gen2 IP is designed to enable advanced SoCs and chiplets with flexible floorplan design options, while the new architecture allows fine-tuning of power and performance based on individual application requirements.
“The Cadence DDR5 IP portfolio, together with Micron’s industry-leading 1γ (1-gamma)-based DRAM, meets the increasing demand for higher memory bandwidth, density and reliability for AI processing workloads. These memory enhancements are pivotal in enabling the next generation AI/ML and HPC applications in data center and enterprise environments,” said
“Cadence’s DDR5 MRDIMM IP system solution, paired with MRDIMM modules featuring Montage’s memory buffers, delivers a high-performance memory subsystem for next-generation servers with doubled bandwidth,” said
“Data center and enterprise applications stand to gain a significant performance advantage from Cadence’s DDR5 12.8Gbps MRDIMM IP system solution, as evidenced by large customers turning to Cadence to deliver this innovative technology,” said
Cadence’s DDR5 controller and PHY have been verified with Cadence’s Verification IP (VIP) for DDR to provide rapid IP and SoC verification closure. Cadence VIP for DDR5 includes a complete solution from IP to system-level verification with DFI VIP, DDR5 memory model and System Performance Analyzer.
For more information on the new solution, visit the Cadence DDR5 MRDIMM PHY and controller page.
About Cadence
Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence’s Intelligent System Design™ strategy, are essential for the world’s leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the
© 2025
Category: Featured
View source version on businesswire.com: https://www.businesswire.com/news/home/20250421736348/en/
For more information, please contact:
Cadence Newsroom
408-944-7039
newsroom@cadence.com
Source: