Intel Editorial: Intel Advances Architecture for Data Center, HPC-AI and Client Computing
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Architecture is alchemy of hardware and software. It blends the best transistors for a given engine, connects them through advanced packaging, integrates high-bandwidth, low-power caches, and equips them with high-capacity, high-bandwidth memories and low-latency scalable interconnects for hybrid computing clusters in a package, while also ensuring that all software accelerates seamlessly. Disclosing the architectural innovations that they have been working on for products that are imminent is something Intel’s architects look forward to each year at Intel Architecture Day, and this year’s event – our third – was the most exciting yet.
Today, we unveiled our biggest shifts in Intel® architectures in a generation. This includes the first in-depth look at
These architectural breakthroughs set the stage for our next era of leadership products, starting soon with
More: Intel Architecture Day 2021 (Press Kit) | Expanding Intel’s Foundry Partnerships: A Critical Piece of IDM 2.0 (Stuart Pann Editorial) | Intel Unveils Biggest Architectural Shifts in a Generation for CPUs, GPUs and IPUs (Architecture Day Fact Sheet)
Our architects are working hard, combining Intel’s unique and rich selection of scalar, vector, matrix and spatial compute engines, to create hybrid computing architectures that deliver non-linear gains on our customers’ most demanding workloads.
You should visit our Newsroom press kit to watch the presentations, but let me walk you through the highlights:
Efficient-core: A highly scalable x86 microarchitecture for addressing compute requirements across the entire spectrum of our customers' needs, from low-power mobile applications to many-core microservices. Compared with Skylake, Intel’s most prolific CPU microarchitecture, the Efficient-core delivers 40% more single-threaded performance at the same power, or the same performance while consuming less than 40% of the power.1 For throughput performance, four Efficient-cores deliver 80% more performance while still consuming less power than two Skylake cores running four threads or the same throughput performance while consuming 80% less power.1
Performance-core: This x86 core is not only the highest performing CPU core Intel has ever built, but it also delivers a step function in CPU architecture performance that will drive the next decade of compute. It was designed as a wider, deeper and smarter architecture to expose more parallelism, increase execution parallelism, reduce latency and increase general purpose performance. It also helps support large data and large code footprint applications. Performance-core provides a Geomean improvement of about 19%, across a wide range of workloads over our current 11th Gen Intel® Core™ architecture (Cypress Cove core) at the same frequency.1
Targeted for data center processors and for the evolving trends in machine learning, Performance-core brings dedicated hardware, including Intel's new Advanced Matrix Extensions (AMX), to perform matrix multiplication operations for an order of magnitude performance – a nearly 8x increase in artificial intelligence acceleration.1 This is architected for software ease of use, leveraging the x86 programming model.
Intel Thread Director: Intel’s unique approach to scheduling was developed to ensure Efficient-cores and Performance-cores work seamlessly together, dynamically and intelligently assigning workloads from the start and optimizing the system for maximum real-world performance and efficiency. With intelligence built directly into the core, Intel Thread Director works seamlessly with the operating system to place the right thread on the right core at the right time.
Xe HPG and Alchemist SoC: A new discrete graphics microarchitecture is designed to scale to enthusiast-class performance for gaming and creation workloads. The Xe HPG microarchitecture features a new Xe-core, a compute-focused programmable and scalable element, and full support for DirectX 12 Ultimate. New matrix engines inside the Xe-cores (referred to as Xe Matrix eXtensions, XMX) accelerate artificial intelligence workloads such as XeSS, a novel upscaling technology that enables high-performance and high-fidelity gaming. Xe HPG-based Alchemist SoCs (formerly code-named DG2) will be coming to market in the first quarter of 2022 under the new Intel® Arc™ brand.
Sapphire Rapids: Combining Intel’s Performance-cores with new accelerator engines,Sapphire Rapids sets the standard for next-generation data center processors.At the heart of Sapphire Rapids is a tiled, modular SoC architecture that delivers significant scalability while still maintaining the benefits of a monolithic CPU interface thanks to Intel’s EMIB multi-die interconnect packaging technology and advanced mesh architecture.
Infrastructure Processing Unit:
Looking back at just the past year, technology was at the heart of how we all communicated, worked, played and coped through the pandemic. Enormous computing power proved crucial. Looking ahead, we face a massive demand for compute – potentially a 1,000x need by 2025. That 1,000-times boost in four years is Moore’s Law to the power of five.
As our CEO,
The world is counting on architects and engineers to solve the most difficult computational problems, to enrich people’s lives. Our strategy and execution are accelerating to meet these demands – at a torrid pace.
1 For workloads and configurations visit www.intel.com/ArchDay21claims.
Statements in this document that refer to future plans or expectations are forward-looking statements. These statements are based on current expectations and involve many risks and uncertainties that could cause actual results to differ materially from those expressed or implied in such statements. For more information on the factors that could cause actual results to differ materially, see our most recent earnings release and
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