Faraday Delivers DDR/LPDDR Combo PHY IP Solutions on UMC’s 22ULP and 14FFC
HSINCHU,
Faraday’s DDR/LPDDR IP solutions feature robust, silicon-proven designs widely adopted in ASIC projects across diverse SoC applications. Full compliance with JEDEC specifications ensures seamless compatibility and allows for flexible performance and power optimization. The 22ULP PHY supports low operating voltage at 0.8V, making it ideal for power-sensitive applications such as mobile, 5G, and IoT devices. The 14nm PHY supports transmission rate up to 6400Mbps for DDR5/LPDDR5 and includes advanced features such as self-training mechanisms, impedance calibration, and DFE.
“Our customers demand high performance and low power in increasingly complex SoCs,” said Flash Lin, COO of Faraday. “With the complete DDR/LPDDR IP solution spanning controller, PHY, and subsystem integration, we’re helping customers accelerate design cycles, reduce development risks, and deliver high-quality, reliable memory subsystems.”
About
View source version on businesswire.com: https://www.businesswire.com/news/home/20250722532220/en/
Press Contact
+886.3.578.7888 ext. 88689
evan@faraday-tech.com
Source: