Innatera Selects Synopsys Simulation to Scale Brain-Inspired Processors for Edge Devices
Innatera adopts
Key Highlights
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Synopsys helps Innatera design chips that enable real-time, energy-efficient AI processing at the edge, catalyzing the development of next-generation applications in physical AI - Synopsys PathFinder-SC™ signoff solution delivers improved precision for more accurate layout-level outcomes, expertly manages design requirements, and enables early-phase analysis
- Synopsys Totem™ power integrity platform enables transistor-level analysis for reliable power delivery and performance optimization for ultra-low-power AI processors
Neuromorphic microcontrollers process information through Spiking Neural Networks (SNNs) that mimic how biological neurons communicate, delivering brain-inspired intelligence at the sensor edge. This event-driven approach enables real-time, ultra-low-power operation in sensor-rich environments where responsiveness and energy efficiency are critical. Innatera's architecture combines mixed-signal analog computation, dense interconnects, and low-voltage design — key enablers of efficiency but potential sources of electrical noise and ESD sensitivity. To address these challenges and ensure robust performance across complex neuromorphic circuits, Innatera leverages PathFinder-SC and Totem to validate power integrity, manage noise coupling, and maintain reliability without compromising speed or efficiency.
PathFinder-SC simulates ESD events at scale, identifying vulnerabilities and root causes before the final design goes to manufacturing and ensuring chips are functioning optimally against real-world electrostatic occurrences. It also provides early, high-fidelity modeling of analog behavior, empowering designers to validate performance under diverse conditions.
Totem performs detailed power integrity analysis at the transistor level, ensuring reliable power delivery and optimal performance for highly efficient AI tasks. By pairing Totem's high-fidelity modeling of typical operating conditions with PathFinder-SC's capacity to identify and address ESD risks, the solution provides designers with a comprehensive reliability tool — one that protects against both expected and unexpected electrical challenges throughout the chip's life cycle and is backed by robust technical support.
"Innatera's mission to redefine edge AI through neuromorphic computing requires both technological innovation and reliable design collaboration," said Aditya Dalakoti, director of SoC and mixed-signal at Innatera. "
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"By enabling Innatera to accelerate product development and scale confidently,
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